174 search results - page 24 / 35 » Functional Test Generation for Full Scan Circuits |
EURODAC
1994
IEEE
15 years 3 months ago
1994
IEEE
Symbolic state space exploration techniques for Finite State Machines (FSMs) are a major recent result in CAD for VLSI. Most of them are exact and based on forward traversal, but ...
ESSCIRC
2011
13 years 11 months ago
2011
— Within-functional-block fine-grained adaptive dual supply voltage control (FADVC) is proposed to reduce the power of CMOS logic circuits. Both process and design variations wi...
IJAIT
2010
14 years 10 months ago
2010
Many real world industrial applications involve finding a Hamiltonian path with minimum cost. Some instances that belong to this category are transportation routing problem, scan c...
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STOC
2005
ACM
15 years 12 months ago
2005
ACM
We investigate constructions of pseudorandom generators that fool polynomial tests of degree d in m variables over finite fields F. Our main construction gives a generator with se...
DATE
2000
IEEE
15 years 4 months ago
2000
IEEE
The Boolean satisfiability problem (SAT) has various applications in electronic design automation (EDA) fields such as testing, timing analysis and logic verification. SAT has bee...