Sciweavers

174 search results - page 28 / 35
» Functional Test Generation for Full Scan Circuits
Sort
View
ISCAS
2008
IEEE
104views Hardware» more  ISCAS 2008»
15 years 6 months ago
An offset compensation technique for bandgap voltage reference in CMOS technology
— A precision integrated bandgap voltage reference in 0.35μm CMOS technology is here presented. The circuit uses natural npn bipolar transistors as reference diodes. A particula...
Stefano Ruzza, Enrico Dallago, Giuseppe Venchi, Se...
MEMOCODE
2007
IEEE
15 years 5 months ago
Combining Multi-Valued Logics in SAT-based ATPG for Path Delay Faults
Due to the rapidly growing speed and the decreasing size of gates in modern chips, the probability of faults caused by the production process grows. Already small variations lead ...
Stephan Eggersglüß, Görschwin Fey,...
DAC
2003
ACM
16 years 17 days ago
A scalable software-based self-test methodology for programmable processors
Software-based self-test (SBST) is an emerging approach to address the challenges of high-quality, at-speed test for complex programmable processors and systems-on chips (SoCs) th...
Li Chen, Srivaths Ravi, Anand Raghunathan, Sujit D...
EUROSYS
2010
ACM
15 years 8 months ago
Splitter: A Proxy-based Approach for Post-Migration Testing of Web Applications
The benefits of virtualized IT environments, such as compute clouds, have drawn interested enterprises to migrate their applications onto new platforms to gain the advantages of ...
Xiaoning Ding, Hai Huang, Yaoping Ruan, Anees Shai...
DIS
2001
Springer
15 years 4 months ago
Functional Trees
In the context of classification problems, algorithms that generate multivariate trees are able to explore multiple representation languages by using decision tests based on a com...
Joao Gama