174 search results - page 31 / 35 » Functional Test Generation for Full Scan Circuits |
103
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DATE
2009
IEEE
15 years 4 months ago
2009
IEEE
—Verification is a major issue in circuit and system design. Formal methods like bounded model checking (BMC) can guarantee a high quality of the verification. There are severa...
104
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GECCO
2006
Springer
15 years 1 months ago
2006
Springer
Embedded Cartesian Genetic Programming (ECGP) is an extension of Cartesian Genetic Programming (CGP) that can automatically acquire, evolve and re-use partial solutions in the for...
FPGA
2005
ACM
15 years 3 months ago
2005
ACM
Creating a new FPGA is a challenging undertaking because of the significant effort that must be spent on circuit design, layout and verification. It currently takes approximately ...
GECCO
2004
Springer
15 years 2 months ago
2004
Springer
In this paper we examine the effects of single node mutations on trees evolved via genetic programming. The results show that neutral mutations are less likely for nodes nearer th...
BMCBI
2010
14 years 9 months ago
2010
Background: The Gene Ontology (GO) is used to describe genes and gene products from many organisms. When used for functional annotation of microarray data, GO is often slimmed by ...