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» Functional Test Generation using Constraint Logic Programmin...
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90
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VTS
2002
IEEE
113views Hardware» more  VTS 2002»
15 years 2 months ago
LI-BIST: A Low-Cost Self-Test Scheme for SoC Logic Cores and Interconnects
For deep sub-micron system-on-chips (SoC), interconnects are critical determinants of performance, reliability and power. Buses and long interconnects being susceptible to crossta...
Krishna Sekar, Sujit Dey
ICDE
2007
IEEE
145views Database» more  ICDE 2007»
15 years 11 months ago
Fast Identification of Relational Constraint Violations
Logical constraints, (e.g., 'phone numbers in toronto can have prefixes 416, 647, 905 only'), are ubiquitous in relational databases. Traditional integrity constraints, ...
Amit Chandel, Nick Koudas, Ken Q. Pu, Divesh Sriva...
83
Voted
VMCAI
2007
Springer
15 years 3 months ago
Constraint Solving for Interpolation
Interpolation is an important component of recent methods for program verification. It provides a natural and effective means for computing separation between the sets of ‘good...
Andrey Rybalchenko, Viorica Sofronie-Stokkermans
75
Voted
APPT
2003
Springer
15 years 2 months ago
Scheduling Outages in Distributed Environments
This paper focuses on the problem of scheduling outages to computer systems in complex distributed environments. The interconnected nature of these systems makes scheduling global ...
Anthony Butler, Hema Sharda, David Taniar
78
Voted
VTS
2007
IEEE
143views Hardware» more  VTS 2007»
15 years 3 months ago
RTL Test Point Insertion to Reduce Delay Test Volume
In this paper, a novel test point insertion methodology is presented for RTL designs that aims to reduce the data volume of scan-based transition delay tests. Test points are iden...
Kedarnath J. Balakrishnan, Lei Fang