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» Functional Verification of Large ASICs
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VLSID
2008
IEEE
225views VLSI» more  VLSID 2008»
14 years 6 months ago
Formal Verification of a Public-Domain DDR2 Controller Design
This paper demonstrates a formal verificationplanning process and presents associated verification strategy that we believe is an essential (yet often neglected) step in an ASIC o...
Abhishek Datta, Vigyan Singhal
TVLSI
2002
130views more  TVLSI 2002»
13 years 6 months ago
Incremental compilation for parallel logic verification systems
Although simulation remains an important part of application-specific integrated circuit (ASIC) validation, hardware-assisted parallel verification is becoming a larger part of the...
R. Tessier, S. Jana
RC
2002
96views more  RC 2002»
13 years 6 months ago
Verification of Invertibility of Complicated Functions over Large Domains
A new method to decide the invertibility of a given high-dimensional function over a domain is presented. The problem arises in the field of verified solution of differential algeb...
Jens Hoefkens, Martin Berz
FMCAD
2006
Springer
13 years 10 months ago
Enabling Large-Scale Pervasive Logic Verification through Multi-Algorithmic Formal Reasoning
Pervasive Logic is a broad term applied to the variety of logic present in hardware designs, yet not a part of their primary functionality. Examples of pervasive logic include init...
Tilman Glökler, Jason Baumgartner, Devi Shanm...
FMCAD
2000
Springer
13 years 10 months ago
A Methodology for Large-Scale Hardware Verification
Abstract. We present a formal verification methodology for datapathdominated hardware. This provides a systematic but flexible framework within which to organize the activities und...
Mark Aagaard, Robert B. Jones, Thomas F. Melham, J...