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120
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ITC
1996
IEEE
127views Hardware» more  ITC 1996»
15 years 7 months ago
Altering a Pseudo-Random Bit Sequence for Scan-Based BIST
This paper presents a low-overhead scheme for built-in self-test of circuits with scan. Complete (100%) fault coverage is obtained without modifying the function logic and without...
Nur A. Touba, Edward J. McCluskey
125
Voted
SFP
2003
15 years 4 months ago
Testing reactive systems with GAST
G∀ST is a fully automatic test system. Given a logical property, stated as a function, it is able to generate appropriate test values, to execute tests with these values, and to ...
Pieter W. M. Koopman, Rinus Plasmeijer
ISMVL
1998
IEEE
109views Hardware» more  ISMVL 1998»
15 years 7 months ago
Implementing a Multiple-Valued Decision Diagram Package
Decision diagrams are the state-of-the-art representation for logic functions, both binary and multiple-valued. Here we consider issues regarding the efficient implementation of a...
D. Miller, Rolf Drechsler
126
Voted
AUSAI
1998
Springer
15 years 7 months ago
cardTAP: Automated Deduction on a Smart Card
We present the rst implementation of a theorem prover which runs on a smart card. The prover is written in Java and implements a dual tableau calculus.1 Due to the limited resource...
Andrew Slater, Rajeev Goré, Joachim Posegga...
ICLP
2007
Springer
15 years 7 months ago
Computing Fuzzy Answer Sets Using dlvhex
Fuzzy answer set programming has been introduced as a framework that successfully combines the concepts of answer set programming and fuzzy logic. In this paper, we show how the fu...
Davy Van Nieuwenborgh, Martine De Cock, Dirk Verme...