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111
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ICCAD
1997
IEEE
99views Hardware» more  ICCAD 1997»
15 years 7 months ago
High-level area and power estimation for VLSI circuits
High-level power estimation, when given only a high-level design specification such as a functional or RTL description, requires high-level estimation of the circuit average acti...
Mahadevamurty Nemani, Farid N. Najm
ECIR
2003
Springer
15 years 4 months ago
From Uncertain Inference to Probability of Relevance for Advanced IR Applications
Uncertain inference is a probabilistic generalisation of the logical view on databases, ranking documents according to their probabilities that they logically imply the query. For ...
Henrik Nottelmann, Norbert Fuhr
ENTCS
2002
97views more  ENTCS 2002»
15 years 3 months ago
Plan in Maude: Specifying an Active Network Programming Language
PLAN is a language designed for programming active networks, and can more generally be regarded as a model of mobile computation. PLAN generalizes the paradigm of imperative funct...
Mark-Oliver Stehr, Carolyn L. Talcott
129
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JFLP
2002
81views more  JFLP 2002»
15 years 3 months ago
A Practical Partial Evaluation Scheme for Multi-Paradigm Declarative Languages
We present a practical partial evaluation scheme for multi-paradigm declarative languages combining features from functional, logic, and concurrent programming. In contrast to pre...
Elvira Albert, Michael Hanus, Germán Vidal
DAC
2009
ACM
16 years 4 months ago
Event-driven gate-level simulation with GP-GPUs
Logic simulation is a critical component of the design tool flow in modern hardware development efforts. It is used widely ? from high-level descriptions down to gate-level ones ?...
Debapriya Chatterjee, Andrew DeOrio, Valeria Berta...