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132
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IJCSS
2007
133views more  IJCSS 2007»
15 years 3 months ago
Synthesis of Read-Once Digital Hardware with Reduced Energy Delay Product
This paper presents a low power driven synthesis framework for the unique class of nonregenerative Boolean Read-Once Functions (BROF). A two-pronged approach is adopted, where the...
P. Balasubramanian, S. Theja
132
Voted
ENTCS
2002
113views more  ENTCS 2002»
15 years 3 months ago
An Operational Semantics for Declarative Multi-Paradigm Languages
Practical declarative multi-paradigm languages combine the main features of functional, logic and concurrent programming (e.g., laziness, sharing, higher-order, logic variables, n...
Elvira Albert, Michael Hanus, Frank Huch, Javier O...
117
Voted
CSUR
1999
137views more  CSUR 1999»
15 years 3 months ago
Algebraic Methods for Specification and Formal Development of Programs
with functions over those sets. This level of abstraction is commensurate with the view that the correctness of the input/output behaviour of a program takes precedence over all it...
Donald Sannella, Andrzej Tarlecki
178
Voted
CSREAESA
2010
15 years 1 months ago
The First Clock Cycle Is A Real BIST
The primary goal of Built-In Self-Test (BIST) for Field Programmable Gate Arrays (FPGAs) is to completely test all programmable logic and routing resources in the device such that ...
Charles E. Stroud, Bradley F. Dutton
142
Voted
ISQED
2011
IEEE
230views Hardware» more  ISQED 2011»
14 years 7 months ago
Constraint generation for software-based post-silicon bug masking with scalable resynthesis technique for constraint optimizatio
Due to the dramatic increase in design complexity, verifying the functional correctness of a circuit is becoming more difficult. Therefore, bugs may escape all verification effo...
Chia-Wei Chang, Hong-Zu Chou, Kai-Hui Chang, Jie-H...