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» Functional logic overloading
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98
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DATE
2006
IEEE
96views Hardware» more  DATE 2006»
15 years 9 months ago
A methodology for FPGA to structured-ASIC synthesis and verification
Structured-ASIC design provides a mid-way point between FPGA and cell-based ASIC design for performance, area and power, but suffers from the same increasing verification burden a...
Michael Hutton, Richard Yuan, Jay Schleicher, Greg...
IFL
2005
Springer
116views Formal Methods» more  IFL 2005»
15 years 9 months ago
Proof Tool Support for Explicit Strictness
In programs written in lazy functional languages such as for example Clean and Haskell, the programmer can choose freely whether particular subexpressions will be evaluated lazily ...
Marko C. J. D. van Eekelen, Maarten de Mol
126
Voted
SEKE
2004
Springer
15 years 9 months ago
Integrating Security Administration into Software Architectures Design
Software architecture plays a central role in developing software systems that satisfy functionality and security requirements. However, little has been done to integrate system d...
Huiqun Yu, Xudong He, Yi Deng, Lian Mo
CAV
2003
Springer
107views Hardware» more  CAV 2003»
15 years 9 months ago
Theorem Proving Using Lazy Proof Explication
Many verification problems reduce to proving the validity of formulas involving both propositional connectives and domain-specific functions and predicates. This paper presents ...
Cormac Flanagan, Rajeev Joshi, Xinming Ou, James B...
GLVLSI
2002
IEEE
160views VLSI» more  GLVLSI 2002»
15 years 8 months ago
Computing walsh, arithmetic, and reed-muller spectral decision diagrams using graph transformations
Spectral techniques have found many applications in computeraided design, including synthesis, verification, and testing. Decision diagram representations permit spectral coeffici...
Whitney J. Townsend, Mitchell A. Thornton, Rolf Dr...