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ICCAD
1999
IEEE
77views Hardware» more  ICCAD 1999»
15 years 5 months ago
Synthesis for multiple input wires replacement of a gate for wiring consideration
The alternative wire technique attempts to replace a target wire by another wire without changing the logic functionality. In this paper, we propose two new transformations of rep...
Shih-Chieh Chang, Jung-Cheng Chuang, Zhong-Zhen Wu
ICCAD
1999
IEEE
84views Hardware» more  ICCAD 1999»
15 years 5 months ago
Synthesis of asynchronous control circuits with automatically generated relative timing assumptions
This paper describes a method of synthesis of asynchronous circuits with relative timing. Asynchronous communication between gates and modules typically utilizes handshakes to ens...
Jordi Cortadella, Michael Kishinevsky, Steven M. B...
ISCAS
1999
IEEE
105views Hardware» more  ISCAS 1999»
15 years 5 months ago
Configuration self-test in FPGA-based reconfigurable systems
An FPGA-based reconfigurable system may contain boards of FPGAs which are reconfigured for different applications and must work correctly. This paper presents a novel approach for...
W. Quddus, Abhijit Jas, Nur A. Touba
FLOPS
1999
Springer
15 years 5 months ago
Typed Higher-Order Narrowing without Higher-Order Strategies
We describe a new approach to higher-order narrowing computations in a class of systems suitable for functional logic programming. Our approach is based on a translation of these s...
Sergio Antoy, Andrew P. Tolmach
FCCM
1998
IEEE
170views VLSI» more  FCCM 1998»
15 years 5 months ago
Characterization and Parameterization of a Pipeline Reconfigurable FPGA
ended abstract defines a class of architectures for pipeline reconfigurable FPGAs by parameterizing a generic model. This class of architectures is sufficiently general to allow e...
Matthew Moe, Herman Schmit, Seth Copen Goldstein