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FPL
2006
Springer
113views Hardware» more  FPL 2006»
15 years 8 months ago
A Novel Heuristic and Provable Bounds for Reconfigurable Architecture Design
This paper is concerned with the application of formal optimisation methods to the design of mixed-granularity FPGAs. In particular, we investigate the appropriate mix and floorpl...
Alastair M. Smith, George A. Constantinides, Peter...
ICSE
2000
IEEE-ACM
15 years 8 months ago
Software economics: a roadmap
The fundamental goal of all good design and engineering is to create maximal value added for any given investment. There are many dimensions in which value can be assessed, from m...
Barry W. Boehm, Kevin J. Sullivan
LPAR
2000
Springer
15 years 8 months ago
Efficient Structural Information Analysis for Real CLP Languages
We present the rational construction of a generic domain for structural information analysis of real CLP languages called Pattern(D ), where the parameter D is an abstract domain s...
Roberto Bagnara, Patricia M. Hill, Enea Zaffanella
153
Voted
CAV
1997
Springer
102views Hardware» more  CAV 1997»
15 years 8 months ago
Efficient Model Checking Using Tabled Resolution
We demonstrate the feasibility of using the XSB tabled logic programming system as a programmable fixed-point engine for implementing efficient local model checkers. In particular,...
Y. S. Ramakrishna, C. R. Ramakrishnan, I. V. Ramak...
127
Voted
ISLPED
1995
ACM
95views Hardware» more  ISLPED 1995»
15 years 8 months ago
Reducing the frequency of tag compares for low power I-cache design
In current processors, the cache controller, which contains the cache directory and other logic such as tag comparators, is active for each instruction fetch and is responsible fo...
Ramesh Panwar, David A. Rennels
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