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130
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TCAD
2008
112views more  TCAD 2008»
15 years 5 months ago
Exploiting Symmetries to Speed Up SAT-Based Boolean Matching for Logic Synthesis of FPGAs
Boolean matching is one of the enabling techniques for technology mapping and logic resynthesis of Field Programmable Gate Array (FPGA). SAT-based Boolean matching (SAT-BM) has bee...
Yu Hu, Victor Shih, Rupak Majumdar, Lei He
151
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BIRTHDAY
2010
Springer
15 years 2 months ago
A Logic for PTIME and a Parameterized Halting Problem
In [7] Nash, Remmel, and Vianu have raised the question whether a logic L, already introduced by Gurevich in 1988, captures polynomial time, and they give a reformulation of this ...
Yijia Chen, Jörg Flum
138
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FAC
2010
93views more  FAC 2010»
15 years 2 months ago
Inter-process buffers in separation logic with rely-guarantee
Separation logic allows simple proofs of concurrent algorithms which use blocking mechanisms such as semaphores. It can even deal with non-blocking algorithms. With the addition of...
Richard Bornat, Hasan Amjad
JFP
2000
91views more  JFP 2000»
15 years 4 months ago
Uniform confluence in concurrent computation
Indeterminism is typical for concurrent computation. If several concurrent actors compete for the same resource then at most one of them may succeed, whereby the choice of the suc...
Joachim Niehren
146
Voted
IFL
2007
Springer
146views Formal Methods» more  IFL 2007»
15 years 11 months ago
A Supercompiler for Core Haskell
Haskell is a functional language, with features such as higher order functions and lazy evaluation, which allow succinct programs. These high-level features present many challenges...
Neil Mitchell, Colin Runciman