Recently Bowers et al. [1] analyzed triplet logic relationships among 4873 Clusters of Orthologous Groups (COGS) from 67 fully sequenced organisms by calculating how well logic re...
Abstract— Reliability enhancements are traditionally implemented through redundancies at the system level or through the use of harden-cell-designs at the circuit level. Reliabil...
Equality logic with or without uninterpreted functions is used for proving the equivalence or refinement between systems (hardware verification, compiler’s translation, etc). C...
For deep sub-micron system-on-chips (SoC), interconnects are critical determinants of performance, reliability and power. Buses and long interconnects being susceptible to crossta...
None of the available minimizers for exact 2-level hazard-free logic minimization can synthesize very large circuits. This limitation has forced researchers to resort to heuristic...