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FCCM
2006
IEEE
125views VLSI» more  FCCM 2006»
16 years 1 months ago
A Multithreaded Soft Processor for SoPC Area Reduction
The growth in size and performance of Field Programmable Gate Arrays (FPGAs) has compelled System-on-aProgrammable-Chip (SoPC) designers to use soft processors for controlling sys...
Blair Fort, Davor Capalija, Zvonko G. Vranesic, St...
KR
1998
Springer
15 years 11 months ago
Combining Narratives
A theory is elaboration tolerant to the extent that new information can be incorporated with only simple changes. The simplest change is conjoining new information, and only conju...
John McCarthy, Tom Costello
WEA
2009
Springer
126views Algorithms» more  WEA 2009»
16 years 1 months ago
Measuring the Similarity of Geometric Graphs
What does it mean for two geometric graphs to be similar? We propose a distance for geometric graphs that we show to be a metric, and that can be computed by solving an integer li...
Otfried Cheong, Joachim Gudmundsson, Hyo-Sil Kim, ...
ICCS
2004
Springer
16 years 10 days ago
Design of Departmental Metacomputing ML
Abstract. Bulk Synchronous Parallel ML or BSML is a functional dataparallel language for programming bulk synchronous parallel (BSP) algorithms. The execution time can be estimated...
Frédéric Gava
FPCA
1995
15 years 10 months ago
A Generalization of Exceptions and Control in ML-like Languages
We add functional continuations and prompts to a language with an ML-style type system. The operators signi cantly extend and simplify the control operators in SML/NJ, and can be ...
Carl A. Gunter, Didier Rémy, Jon G. Riecke