In this paper we present an algorithm for converting a BDD representation of a logic function into a multiple-level netlist of disjoint-support subfunctions. On the theoretical si...
We propose a new BDD-based method for decomposition of multi-output incompletely specified logic functions into netlists of two-input logic gates. The algorithm uses the internal ...
Alan Mishchenko, Bernd Steinbach, Marek A. Perkows...
In efforts to overcome the complexity of the syntax and the lack of formal semantics of conventional hardware description languages, a number of functional hardware description la...
In this paper, the Simulated Evolution algorithm (SimE) is engineered to solve the optimization problem of multi-objective VLSI netlist bi-partitioning. The multi-objective versio...
Sadiq M. Sait, Aiman H. El-Maleh, Rush H. Al-Abuji
We present a general framework for the construction of vertex orderings for netlist clustering. Our WINDOW algorithm constructs an ordering by iteratively adding the vertex with h...