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PPL
2008
185views more  PPL 2008»
15 years 6 months ago
On Design and Application Mapping of a Network-on-Chip(NoC) Architecture
As the number of integrated IP cores in the current System-on-Chips (SoCs) keeps increasing, communication requirements among cores can not be sufficiently satisfied using either ...
Jun Ho Bahn, Seung Eun Lee, Yoon Seok Yang, Jungso...
159
Voted
ICSE
1998
IEEE-ACM
15 years 10 months ago
Non-Intrusive Object Introspection in C++: Architecture and Application
We describe the design and implementation of system architecture to support object introspection in C++. In this system, information is collected by parsing class declarations, an...
Tyng-Ruey Chuang, Y. S. Kuo, Chien-Min Wang
151
Voted
ICCAD
2006
IEEE
141views Hardware» more  ICCAD 2006»
16 years 3 months ago
A code refinement methodology for performance-improved synthesis from C
Although many recent advances have been made in hardware synthesis techniques from software programming languages such as C, the performance of synthesized hardware commonly suffe...
Greg Stitt, Frank Vahid, Walid A. Najjar
SAC
2010
ACM
15 years 6 months ago
Efficient mapping and voltage islanding technique for energy minimization in NoC under design constraints
Voltage islanding technique in Network-on-Chip (NoC) can significantly reduce the computational energy consumption by scaling down the voltage levels of the processing elements (P...
Pavel Ghosh, Arunabha Sen
CL
2008
Springer
15 years 6 months ago
Efficient exception handling in Java bytecode-to-C ahead-of-time compiler for embedded systems
One of the most promising approaches to Java acceleration in embedded systems is a bytecode-to-C ahead-of-time compiler (AOTC). It improves the performance of a Java virtual machi...
Dong-Heon Jung, Jong Kuk Park, Sung-Hwan Bae, Jaem...