142 search results - page 17 / 29 » Functional test generation for non-scan sequential circuits |
ATS
2003
IEEE
15 years 3 months ago
2003
IEEE
Capacitive crosstalk can give rise to slowdown of signals that can propagate to a circuit output and create a functional error. A test generation methodology, called XGEN, was dev...
DAC
2000
ACM
15 years 10 months ago
2000
ACM
In this paper we describe an area efficient power minimization scheme "Control Generated ClockingI` that saves significant amounts of power in datapath registers and clock dr...
GLVLSI
2002
IEEE
15 years 2 months ago
2002
IEEE
Design simplification is becoming necessary to respect the target time-to-market of SoCs, and this goal can be obtained by using predesigned IP-cores. However, their correct inte...
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INTEGRATION
2006
14 years 9 months ago
2006
Improving testability during the early stages of high-level synthesis has several benefits including reduced test hardware overheads, reduced test costs, reduced design iterations...
ATS
2003
IEEE
15 years 3 months ago
2003
IEEE
Software-based self-testing is a promising approach for the testing of processor cores which are embedded inside a System-on-a-Chip (SoC), as it can apply test vectors in function...