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» Functional test generation for non-scan sequential circuits
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DAC
2002
ACM
14 years 7 months ago
The next chip challenge: effective methods for viable mixed technology SoCs
The next generation of computer chips will continue the trend for more complexity than their predecessors. Many of them will contain different chip technologies and are termed SoC...
H. Bernhard Pogge
DAC
2001
ACM
14 years 7 months ago
A True Single-Phase 8-bit Adiabatic Multiplier
This paper presents the design and evaluation of an 8-bit adiabatic multiplier. Both the multiplier core and its built-in self-test logic have been designed using a true single-ph...
Suhwan Kim, Conrad H. Ziesler, Marios C. Papaefthy...