—Traditional rate adaptation solutions for IEEE 802.11 wireless networks perform poorly in congested networks. Measurement studies show that congestion in a wireless network lead...
— Scaling down the voltage levels of the processing elements (PEs) in a Network-on-Chip (NoC) can significantly reduce the computation energy consumption with an overhead of the...
—In this paper, we derive tight upper and lower bounds for the average sum rate of two-way amplify-andforward (AF) half-duplex relaying, which show that two-way AF half-duplex re...
Yang Han, See Ho Ting, Chin Keong Ho, Woon Hau Chi...
With increasing reliability concerns for current and next generation VLSI technologies, fault-tolerance is fast becoming an integral part of system-on-chip and multicore architect...
In this paper we propose a hardware real time operating system (HW-RTOS) that implements the OS layer in a dual-processor SMP architecture. Intertask communication is specified b...