17967 search results - page 3239 / 3594 » Functional timing optimization |
151
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VLSID
2009
IEEE
16 years 5 months ago
2009
IEEE
: The challenges in nano-CMOS circuit design include the following: variability, leakage, power, thermals, reliability, and yield. This talk will focus on interdependent considerat...
161
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PPOPP
2009
ACM
16 years 5 months ago
2009
ACM
The efficient mapping of program parallelism to multi-core processors is highly dependent on the underlying architecture. This paper proposes a portable and automatic compiler-bas...
151
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SPAA
2009
ACM
16 years 5 months ago
2009
ACM
We consider buffer management of unit packets with deadlines for a multi-port device with reconfiguration overhead. The goal is to maximize the throughput of the device, i.e., the...
130
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TCC
2009
Springer
16 years 5 months ago
2009
Springer
: The aim of this paper is to demonstrate the feasibility of authenticated throughput-ecient routing in an unreliable and dynamically changing synchronous network in which the majo...
236
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POPL
2007
ACM
16 years 5 months ago
2007
ACM
Concurrent ML (CML) is a statically-typed higher-order concurrent language that is embedded in Standard ML. Its most notable feature is its support for first-class synchronous ope...