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IPPS
1998
IEEE
15 years 2 months ago
PACE: Processor Architectures for Circuit Emulation
We describe a family of reconfigurable parallel architectures for logic emulation. They are supposed to be applicable like conventional FPGAs, while covering a larger range of circ...
Reiner Kolla, Oliver Springauf
DATE
1997
IEEE
107views Hardware» more  DATE 1997»
15 years 2 months ago
Acceleration of behavioral simulation on simulation specific machines
Behavioral simulation is faster than gate-level logic simulation, however, the simulation speed is too slow for large systems. Simulation specific machines accelerated simulation ...
Minoru Shoji, Fumiyasu Hirose, Shintaro Shimogori,...
FSEN
2007
Springer
15 years 1 months ago
Model Checking Temporal Metric Specifications with Trio2Promela
Abstract. We present Trio2Promela, a tool for model checking TRIO specifications by means of Spin. TRIO is a linear-time temporal logic with both future and past operators and a qu...
Domenico Bianculli, Paola Spoletini, Angelo Morzen...
ECOOPW
2000
Springer
15 years 1 months ago
Objects and Classification
Abstract. Classification is a central concept in object-oriented approaches such as object-oriented programming, object-oriented knowledge representation systems (including descrip...
Marianne Huchard, Robert Godin, Amedeo Napoli
ECOOP
1995
Springer
15 years 1 months ago
Interface-Based Protocol Specification of Open Systems using PSL
PSL is a framework for describing dynamic and architectural properties of open systems. PSL extends established interface-based tactics for describing the functional properties of...
Doug Lea, Jos Marlowe