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IEEEPACT
2005
IEEE
15 years 11 months ago
Future Execution: A Hardware Prefetching Technique for Chip Multiprocessors
This paper proposes a new hardware technique for using one core of a CMP to prefetch data for a thread running on another core. Our approach simply executes a copy of all non-cont...
Ilya Ganusov, Martin Burtscher
DATE
2009
IEEE
137views Hardware» more  DATE 2009»
16 years 14 days ago
Adaptive prefetching for shared cache based chip multiprocessors
Abstract—Chip multiprocessors (CMPs) present a unique scenario for software data prefetching with subtle tradeoffs between memory bandwidth and performance. In a shared L2 based ...
Mahmut T. Kandemir, Yuanrui Zhang, Ozcan Ozturk
PPOPP
2009
ACM
16 years 6 months ago
A compiler-directed data prefetching scheme for chip multiprocessors
Data prefetching has been widely used in the past as a technique for hiding memory access latencies. However, data prefetching in multi-threaded applications running on chip multi...
Dhruva Chakrabarti, Mahmut T. Kandemir, Mustafa Ka...
117
Voted
DATE
2010
IEEE
165views Hardware» more  DATE 2010»
15 years 10 months ago
Multiplexed redundant execution: A technique for efficient fault tolerance in chip multiprocessors
Pramod Subramanyan, Virendra Singh, Kewal K. Saluj...
PDP
2010
IEEE
15 years 10 months ago
Energy-Efficient Hardware Prefetching for CMPs Using Heterogeneous Interconnects
In the last years high performance processor designs have evolved toward Chip-Multiprocessor (CMP) architectures that implement multiple processing cores on a single die. As the nu...
Antonio Flores, Juan L. Aragón, Manuel E. A...