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ASPLOS
2004
ACM
15 years 5 months ago
Continual flow pipelines
Increased integration in the form of multiple processor cores on a single die, relatively constant die sizes, shrinking power envelopes, and emerging applications create a new cha...
Srikanth T. Srinivasan, Ravi Rajwar, Haitham Akkar...
ISLPED
2004
ACM
137views Hardware» more  ISLPED 2004»
15 years 5 months ago
Location cache: a low-power L2 cache system
While set-associative caches incur fewer misses than directmapped caches, they typically have slower hit times and higher power consumption, when multiple tag and data banks are p...
Rui Min, Wen-Ben Jone, Yiming Hu
MOBICOM
2004
ACM
15 years 5 months ago
PAVAN: a policy framework for content availabilty in vehicular ad-hoc networks
Advances in wireless communication, storage and processing are realizing next-generation in-vehicle entertainment systems. Even if hundreds of different video or audio titles are...
Shahram Ghandeharizadeh, Shyam Kapadia, Bhaskar Kr...
WMPI
2004
ACM
15 years 5 months ago
The Opie compiler from row-major source to Morton-ordered matrices
The Opie Project aims to develop a compiler to transform C codes written for row-major matrix representation into equivalent codes for Morton-order matrix representation, and to a...
Steven T. Gabriel, David S. Wise
ICS
2004
Tsinghua U.
15 years 5 months ago
CQoS: a framework for enabling QoS in shared caches of CMP platforms
Cache hierarchies have been traditionally designed for usage by a single application, thread or core. As multi-threaded (MT) and multi-core (CMP) platform architectures emerge and...
Ravi R. Iyer