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141
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AUIC
2002
IEEE
15 years 10 months ago
Evolving the Browser Towards a Standard User Interface Architecture
If current trends continue, it is likely that the web browser will become the only widely used user interface. Web applications will become the predominant software. Should this h...
Michael J. Rees
SAMOS
2009
Springer
15 years 11 months ago
Implementing Fine/Medium Grained TLP Support in a Many-Core Architecture
We believe that future many-core architectures should support a simple and scalable way to execute many threads that are generated by parallel programs. A good candidate to impleme...
Roberto Giorgi, Zdravko Popovic, Nikola Puzovic
MICRO
2010
IEEE
153views Hardware» more  MICRO 2010»
15 years 2 months ago
Throughput-Effective On-Chip Networks for Manycore Accelerators
As the number of cores and threads in manycore compute accelerators such as Graphics Processing Units (GPU) increases, so does the importance of on-chip interconnection network des...
Ali Bakhoda, John Kim, Tor M. Aamodt
149
Voted
FPL
2008
Springer
141views Hardware» more  FPL 2008»
15 years 6 months ago
An analytical model describing the relationships between logic architecture and FPGA density
This paper describes an analytical model, based principally on Rent's Rule, that relates logic architectural parameters to the area efficiency of an FPGA. In particular, the ...
Andrew Lam, Steven J. E. Wilton, Philip Heng Wai L...
SBACPAD
2007
IEEE
121views Hardware» more  SBACPAD 2007»
15 years 11 months ago
DTA-C: A Decoupled multi-Threaded Architecture for CMP Systems
One way to exploit Thread Level Parallelism (TLP) is to use architectures that implement novel multithreaded execution models, like Scheduled DataFlow (SDF). This latter model pro...
Roberto Giorgi, Zdravko Popovic, Nikola Puzovic