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IPPS
2009
IEEE
15 years 4 months ago
A cross-input adaptive framework for GPU program optimizations
Abstract—Recent years have seen a trend in using graphic processing units (GPU) as accelerators for general-purpose computing. The inexpensive, single-chip, massively parallel ar...
Yixun Liu, Eddy Z. Zhang, Xipeng Shen
IPPS
2009
IEEE
15 years 4 months ago
Accelerating error correction in high-throughput short-read DNA sequencing data with CUDA
Emerging DNA sequencing technologies open up exciting new opportunities for genome sequencing by generating read data with a massive throughput. However, produced reads are signif...
Haixiang Shi, Bertil Schmidt, Weiguo Liu, Wolfgang...
FPL
2006
Springer
242views Hardware» more  FPL 2006»
15 years 1 months ago
TMD-MPI: An MPI Implementation for Multiple Processors Across Multiple FPGAs
With current FPGAs, designers can now instantiate several embedded processors, memory units, and a wide variety of IP blocks to build a single-chip, high-performance multiprocesso...
Manuel Saldaña, Paul Chow
WSC
2008
14 years 11 months ago
High performance spreadsheet simulation on a desktop grid
We present a proof-of-concept prototype for high performance spreadsheet simulation called S3. Our goal is to provide a user-friendly, yet computationally powerful simulation envi...
Juta Pichitlamken, Supasit Kajkamhaeng, Putchong U...
FPL
2008
Springer
163views Hardware» more  FPL 2008»
14 years 11 months ago
Towards an "early neural circuit simulator": A FPGA implementation of processing in the rat whisker system
We have constructed a FPGA-based "early neural circuit simulator" to model the first two stages of stimulus encoding and processing in the rat whisker system. Rats use t...
Brian Leung, Yan Pan, Chris Schroeder, Seda Ogrenc...