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CJ
2006
84views more  CJ 2006»
14 years 9 months ago
Instruction Level Parallelism through Microthreading - A Scalable Approach to Chip Multiprocessors
Most microprocessor chips today use an out-of-order instruction execution mechanism. This mechanism allows superscalar processors to extract reasonably high levels of instruction ...
Kostas Bousias, Nabil Hasasneh, Chris R. Jesshope
GRID
2006
Springer
14 years 9 months ago
Providing Portlet-Based Client Access to CIMA-Enabled Crystallographic Instruments, Sensors, and Data
The Common Instrument Middleware Architecture (CIMA) project, supported by the NSF Middleware Initiative, aims at making scientific instruments and sensors remotely accessible by ...
Hao Yin, Donald F. McMullen, Mehmet A. Nacar, Marl...
111
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TVLSI
2008
157views more  TVLSI 2008»
14 years 9 months ago
Scalable QoS-Aware Memory Controller for High-Bandwidth Packet Memory
This paper proposes a high-performance scalable quality-of-service (QoS)-aware memory controller for the packet memory where packet data are stored in network routers. A major chal...
Hyuk-Jun Lee, Eui-Young Chung
AIS
1999
Springer
14 years 9 months ago
Preserving communication context: Virtual workspace and interpersonal space in Japanese CSCW
The past decade has seen the development of a perspective holding that technology is socially constructed (Mackenzie and Wacjman, 1985; Bijker, Hughes and Pinch, 1987; Bijker and L...
Lorna Heaton
ISCI
2002
130views more  ISCI 2002»
14 years 9 months ago
A study of object declustering strategies in parallel temporal object database systems
In a transaction-time temporal object database management system (TODBMS), updating an object creates a new version of the object, but the old version is still accessible. A TODBM...
Kjetil Nørvåg