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ISCAS
1994
IEEE
65views Hardware» more  ISCAS 1994»
15 years 1 months ago
Gain Enhancement Technique for High-Speed Switched-Capacitor Circuits
S. Brigati, Franco Maloberti, Guido Torelli
ASPDAC
2008
ACM
162views Hardware» more  ASPDAC 2008»
14 years 11 months ago
A CMOS direct sampling mixer using Switched Capacitor Filter technique for software-defined radio
This paper proposes a novel direct sampling mixer (DSM) using Switched Capacitor Filter (SCF) for multi-band receivers. The proposed DSM has a higher gain, more flexibility and low...
Hong Phuc Ninh, Takashi Moue, Takashi Kurashina, K...
86
Voted
ISQED
2006
IEEE
176views Hardware» more  ISQED 2006»
15 years 3 months ago
Robust Dynamic Node Low Voltage Swing Domino Logic with Multiple Threshold Voltages
— A new low voltage swing circuit technique based on a dual threshold voltage CMOS technology is presented in this paper for simultaneously reducing active and standby mode power...
Zhiyu Liu, Volkan Kursun
DAC
1994
ACM
15 years 1 months ago
Clock Grouping: A Low Cost DFT Methodology for Delay Testing
A low overhead DFT technique, called clock-grouping, for delay testing of sequential synchronous circuits is presented. The proposed technique increases robust path delay fault co...
Wen-Chang Fang, Sandeep K. Gupta
ISCAS
2005
IEEE
122views Hardware» more  ISCAS 2005»
15 years 3 months ago
A mixed analog-digital hybrid for speech enhancement purposes
Abstract— This paper presents and evaluates a hybrid implementation of a low complexity algorithm for speech enhancement, the Adaptive Gain Equalizer (AGE). The AGE is a subband ...
Benny Sallberg, Mattias Dahl, Henrik Akesson, Ingv...