This paper focuses on jammed timing channels. Pure delay jammers with a maximum delay constraint, an average delay constraint, or a maximum buffer size constraint are explored, for...
In a Chip Multi-Processor (CMP) with private caches, the last level cache is statically partitioned between all the cores. This prevents such CMPs from sharing cache capacity in r...
— One of the distinctive features in a wireless ad hoc network is lack of any central controller or single point of authority, in which each node/link then makes its own decision...
Chengnian Long, Qian Zhang, Bo Li, Huilong Yang, X...
This paper studies the use of pricing as an incentive mechanism to encourage private, self-interested nodes to participate in a public wireless mesh network and cooperate in the p...
The paper studies the routing in the network shared by several users. Each user seeks to optimize either its own performance or some combination between its own performance and tha...