32 search results - page 3 / 7 » Gate Level Statistical Simulation Based on Parameterized Mod... |
DAC
2006
ACM
14 years 7 months ago
2006
ACM
We propose a scalable and efficient parameterized block-based statistical static timing analysis algorithm incorporating both Gaussian and non-Gaussian parameter distributions, ca...
DATE
2008
IEEE
14 years 22 days ago
2008
IEEE
Statistical timing analysis needs a priori knowledge of process variations. Lack of such a priori knowledge of process variations prevents accurate statistical timing analysis, fo...
DAC
2009
ACM
14 years 7 months ago
2009
ACM
Embedded cryptosystems show increased vulnerabilities to implementation attacks such as power analysis. CMOS technology trends are causing increased process variations which impac...
DATE
2006
IEEE
14 years 10 days ago
2006
IEEE
Abstract— Continuing scaling of CMOS technology has allowed aggressive pursuant of increased clock rate in DSM chips. The ever shorter clock period has made switching times of di...
ISQED
2007
IEEE
14 years 17 days ago
2007
IEEE
In nanometer regime, the effects of variations are having an increasing impact on the delay and power characteristics of devices as well as the yield of the circuit. Statistical t...