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» Gate-level synthesis for low-power using new transformations
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DATE
2007
IEEE
102views Hardware» more  DATE 2007»
15 years 3 months ago
Efficient testbench code synthesis for a hardware emulator system
: - The rising complexity of modern embedded systems is causing a significant increase in the verification effort required by hardware designers and software developers, leading to...
Ioannis Mavroidis, Ioannis Papaefstathiou
ICES
2010
Springer
277views Hardware» more  ICES 2010»
14 years 7 months ago
An Efficient, High-Throughput Adaptive NoC Router for Large Scale Spiking Neural Network Hardware Implementations
Recently, a reconfigurable and biologically inspired paradigm based on network-on-chip (NoC) and spiking neural networks (SNNs) has been proposed as a new method of realising an ef...
Snaider Carrillo, Jim Harkin, Liam McDaid, Sandeep...
ICIP
2008
IEEE
15 years 3 months ago
AM-FM image filters
We introduce a multicomponent invertible AM-FM image transform and use it to define new nonlinear AM-FM filters for performing modulation domain image processing. The key elemen...
Chuong T. Nguyen, Joseph P. Havlicek
PLDI
2006
ACM
15 years 3 months ago
Correctness-preserving derivation of concurrent garbage collection algorithms
Constructing correct concurrent garbage collection algorithms is notoriously hard. Numerous such algorithms have been proposed, implemented, and deployed – and yet the relations...
Martin T. Vechev, Eran Yahav, David F. Bacon
ASPDAC
2006
ACM
119views Hardware» more  ASPDAC 2006»
15 years 3 months ago
Using speculative computation and parallelizing techniques to improve scheduling of control based designs
Recent research results have seen the application of parallelizing techniques to high-level synthesis. In particular, the effect of speculative code transformations on mixed contr...
Roberto Cordone, Fabrizio Ferrandi, Marco D. Santa...