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128
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IEEEPACT
2003
IEEE
15 years 9 months ago
Reactive Multi-Word Synchronization for Multiprocessors
Shared memory multiprocessor systems typically provide a set of hardware primitives in order to support synchronization. Generally, they provide single-word read-modify-write hard...
Phuong Hoai Ha, Philippas Tsigas
131
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FPGA
2005
ACM
174views FPGA» more  FPGA 2005»
15 years 9 months ago
64-bit floating-point FPGA matrix multiplication
We introduce a 64-bit ANSI/IEEE Std 754-1985 floating point design of a hardware matrix multiplier optimized for FPGA implementations. A general block matrix multiplication algor...
Yong Dou, Stamatis Vassiliadis, Georgi Kuzmanov, G...
132
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APPINF
2003
15 years 5 months ago
The Force Model: Concept, Behavior, Interpretation
Most experiments in research on autonomous agents and mobile robots are performed either in simulation or on robots with static physical properties; evolvable hardware is hardly e...
Ralf Salomon
141
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IEEECIT
2010
IEEE
15 years 2 months ago
CFCSS without Aliasing for SPARC Architecture
With the increasing popularity of COTS (commercial off the shelf) components and multi-core processor in space and aviation applications, software fault tolerance becomes attracti...
Chao Wang, Zhongchuan Fu, Hongsong Chen, Wei Ba, B...
141
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MBEES
2010
15 years 5 months ago
Towards Architectural Programming of Embedded Systems
: Integrating architectural elements with a modern programming language is essential to ensure a smooth combination of architectural design and programming. In this position statem...
Arne Haber, Jan Oliver Ringert, Bernhard Rumpe