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ISCA
2002
IEEE
174views Hardware» more  ISCA 2002»
15 years 3 months ago
Efficient Task Partitioning Algorithms for Distributed Shared Memory Systems
In this paper, we consider the tree task graphs which arise from many important programming paradigms such as divide and conquer, branch and bound etc., and the linear task-graphs...
Sibabrata Ray, Hong Jiang
154
Voted
PC
2007
161views Management» more  PC 2007»
15 years 3 months ago
High performance combinatorial algorithm design on the Cell Broadband Engine processor
The Sony–Toshiba–IBM Cell Broadband Engine (Cell/B.E.) is a heterogeneous multicore architecture that consists of a traditional microprocessor (PPE) with eight SIMD co-process...
David A. Bader, Virat Agarwal, Kamesh Madduri, Seu...
151
Voted
WOWMOM
2009
ACM
146views Multimedia» more  WOWMOM 2009»
15 years 10 months ago
When opportunity proceeds from autonomy: A tour-based architecture for disconnected mobile sensors
We consider the case of sparse mobile sensors deployed to implement missions in challenging environments. This paper explores a notion of tour networks that is well suited to circ...
Michel Charpentier, Radim Bartos, Swapnil Bhatia
130
Voted
IPPS
2006
IEEE
15 years 9 months ago
GPU-ABiSort: optimal parallel sorting on stream architectures
In this paper, we present a novel approach for parallel sorting on stream processing architectures. It is based on adaptive bitonic sorting. For sorting n values utilizing p strea...
Alexander Greß, Gabriel Zachmann
125
Voted
SPIN
2004
Springer
15 years 9 months ago
Explicit State Model Checking with Hopper
The Murϕ-based Hopper tool is a general purpose explicit model checker. Hopper leverages Murϕ’s class structure to implement new algorithms. Hopper differs from Murϕ in that i...
Michael Jones, Eric Mercer