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CODES
2008
IEEE
15 years 10 months ago
2008
IEEE
The heterogeneity of modern MPSoC architectures, coupled with the increasing complexity of the applications mapped onto them has recently led to a lot of interest in hybrid perfor...
132
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IEEEPACT
2007
IEEE
15 years 10 months ago
2007
IEEE
Multi-core processors naturally exploit thread-level parallelism (TLP). However, extracting instruction-level parallelism (ILP) from individual applications or threads is still a ...
148
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DATE
2005
IEEE
15 years 9 months ago
2005
IEEE
Efficient evaluation of design choices, in terms of selection of algorithms to be implemented as hardware or software, and finding an optimal hw/sw design mix is an important re...
140
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CODES
2008
IEEE
15 years 10 months ago
2008
IEEE
Instruction set extensions (ISEs) can accelerate embedded processor performance. Many algorithms for ISE generation have shown good potential; some of them have recently been expa...
147
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CONEXT
2009
ACM
15 years 4 months ago
2009
ACM
In enterprise and data center networks, the scalability of the data plane becomes increasingly challenging as forwarding tables and link speeds grow. Simply building switches with...