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COMPGEOM
2000
ACM
15 years 6 months ago
Fast computation of generalized Voronoi diagrams using graphics hardware
: We present a new approach for computing generalized Voronoi diagrams in two and three dimensions using interpolation-based polygon rasterization hardware. The input primitives ma...
Kenneth E. Hoff III, Tim Culver, John Keyser, Ming...
111
Voted
IPPS
2002
IEEE
15 years 6 months ago
Parallel Genehunter: Implementation of a Linkage Analysis Package for Distributed-Memory Architectures
We present a parallel algorithm for performing multipoint linkage analysis of genetic marker data on large family pedigrees. The algorithm effectively distributes both the computa...
Gavin C. Conant, Steve Plimpton, William Old, Andr...
128
Voted
TC
2010
15 years 6 days ago
Network-on-Chip Hardware Accelerators for Biological Sequence Alignment
—The most pervasive compute operation carried out in almost all bioinformatics applications is pairwise sequence homology detection (or sequence alignment). Due to exponentially ...
Souradip Sarkar, Gaurav Ramesh Kulkarni, Partha Pr...
HPCA
2007
IEEE
16 years 2 months ago
HARD: Hardware-Assisted Lockset-based Race Detection
The emergence of multicore architectures will lead to an increase in the use of multithreaded applications that are prone to synchronization bugs, such as data races. Software sol...
Pin Zhou, Radu Teodorescu, Yuanyuan Zhou
DSD
2006
IEEE
183views Hardware» more  DSD 2006»
15 years 8 months ago
Design and Implementation of Low-Area and Low-Power AES Encryption Hardware Core
The Advanced Encryption Standard (AES) algorithm has become the default choice for various security services in numerous applications. In this paper we present an AES encryption h...
Panu Hämäläinen, Timo Alho, Marko H...