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DDECS
2006
IEEE
79views Hardware» more  DDECS 2006»
15 years 9 months ago
Multiple-Vector Column-Matching BIST Design Method
- Extension of a BIST design algorithm is proposed in this paper. The method is based on a synthesis of a combinational block - the decoder, transforming pseudo-random code words i...
Petr Fiser, Hana Kubatova
128
Voted
DAC
2005
ACM
16 years 4 months ago
Enhanced leakage reduction Technique by gate replacement
Input vector control (IVC) technique utilizes the stack effect in CMOS circuit to apply the minimum leakage vector (MLV) to the circuit at the sleep mode to reduce leakage. Additi...
Lin Yuan, Gang Qu
127
Voted
FPGA
2003
ACM
137views FPGA» more  FPGA 2003»
15 years 9 months ago
Customized regular channel design in FPGAs
FPGAs are one of the essential components in platform-based embedded systems. Such systems are customized and applied only to a limited set of applications. Also some applications...
Elaheh Bozorgzadeh, Majid Sarrafzadeh
137
Voted
HPCA
2009
IEEE
16 years 4 months ago
Bridging the computation gap between programmable processors and hardwired accelerators
New media and signal processing applications demand ever higher performance while operating within the tight power constraints of mobile devices. A range of hardware implementatio...
Kevin Fan, Manjunath Kudlur, Ganesh S. Dasika, Sco...
157
Voted
BMCBI
2007
219views more  BMCBI 2007»
15 years 3 months ago
MetaQTL: a package of new computational methods for the meta-analysis of QTL mapping experiments
Background: Integration of multiple results from Quantitative Trait Loci (QTL) studies is a key point to understand the genetic determinism of complex traits. Up to now many effor...
Jean-Baptiste Veyrieras, Bruno Goffinet, Alain Cha...