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DAC
2008
ACM
16 years 2 months ago
Symbolic noise analysis approach to computational hardware optimization
This paper addresses the problem of computational error modeling and analysis. Choosing different word-lengths for each functional unit in hardware implementations of numerical al...
Arash Ahmadi, Mark Zwolinski
108
Voted
VISUALIZATION
2005
IEEE
15 years 7 months ago
General Purpose Computation on Graphics Hardware
The rapid increase in the performance of graphics hardware, coupled with recent improvements in its programmability, have made graphics hardware a compelling platform for computat...
Aaron E. Lefohn, Ian Buck, Patrick S. McCormick, J...
ICONS
2008
IEEE
15 years 8 months ago
An Efficient Hardware Implementation of the Tate Pairing in Characteristic Three
DL systems with bilinear structure recently became an important base for cryptographic protocols such as identity-based encryption (IBE). Since the main computational task is the ...
Giray Kömürcü, Erkay Savas
DAC
2000
ACM
16 years 2 months ago
Hardware implementation of communication protocols modeled by concurrent EFSMs with multi-way synchronization
In this paper, we propose a technique to implement communication protocols as hardware circuits using a model of concurrent EFSMs with multi-way synchronization. Since use of mult...
Hisaaki Katagiri, Keiichi Yasumoto, Akira Kitajima...
108
Voted
DSD
2007
IEEE
178views Hardware» more  DSD 2007»
15 years 8 months ago
An Efficient Intra Prediction Hardware Architecture for H.264 Video Decoding
In this paper, we present an efficient hardware architecture for real-time implementation of intra prediction algorithm used in H.264 / MPEG4 Part 10 video coding standard. The ha...
Esra Sahin, Ilker Hamzaoglu