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ICRA
2000
IEEE
180views Robotics» more  ICRA 2000»
15 years 6 months ago
Interactive Motion Planning Using Hardware-Accelerated Computation of Generalized Voronoi Diagrams
We present techniques for fast motion planning by using discrete approximations of generalized Voronoi diagrams, computed with graphics hardware. Approaches based on this diagram ...
Kenneth E. Hoff III, Tim Culver, John Keyser, Ming...
CAMP
2000
IEEE
15 years 6 months ago
A Distributed Architecture for Autonomous Navigation of Robots
The paper shows a distributed architecture for autonomous robot navigation. The architecture is based on three modules that are implemented on separate and interacting agents: the...
Vito Di Gesù, B. Lenzitti, Giosuè Lo...
CHES
2010
Springer
187views Cryptology» more  CHES 2010»
15 years 3 months ago
Garbled Circuits for Leakage-Resilience: Hardware Implementation and Evaluation of One-Time Programs - (Full Version)
The power of side-channel leakage attacks on cryptographic implementations is evident. Today's practical defenses are typically attack-specific countermeasures against certain...
Kimmo Järvinen, Vladimir Kolesnikov, Ahmad-Re...
IJCNN
2000
IEEE
15 years 6 months ago
Hardware Implementation of a PCA Learning Network by an Asynchronous PDM Digital Circuit
We have fabricated a PCA (Principal Component Analysis) learning network in a FPGA (Field Programmable Gate Array) by using an asynchronous PDM (Pulse Density Modulation) digital ...
Yuzo Hirai, Kuninori Nishizawa
DATE
2009
IEEE
242views Hardware» more  DATE 2009»
15 years 8 months ago
A high performance reconfigurable Motion Estimation hardware architecture
Motion Estimation (ME) is the most computationally intensive part of video compression and video enhancement systems. For the recently available high definition frame sizes and hi...
Ozgur Tasdizen, Halil Kukner, Abdulkadir Akin, Ilk...