1862 search results - page 227 / 373 » General Architecture for Hardware Implementation of Genetic ... |
116
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DAC
2009
ACM
16 years 4 months ago
2009
ACM
Logic simulation is a critical component of the design tool flow in modern hardware development efforts. It is used widely ? from high-level descriptions down to gate-level ones ?...
114
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DAC
2005
ACM
16 years 4 months ago
2005
ACM
This paper presents a parameterized soft core generator for the discrete Fourier transform (DFT). Reusable IPs of digital signal processing (DSP) kernels are important time-saving...
130
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DATE
2009
IEEE
15 years 10 months ago
2009
IEEE
In the field of chip design, hardware module reuse is a standard solution to the increasing complexity of chip architecture and the pressures to reduce time to market. In the abs...
149
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SAMOS
2004
Springer
15 years 9 months ago
2004
Springer
In recent years, power consumption has become a critical concern for many VLSI systems. Whereas several case studies demonstrate that technology-, layout-, and gate-level technique...
144
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DAC
2004
ACM
16 years 4 months ago
2004
ACM
Current technology trends have led to the growing impact of both inter-die and intra-die process variations on circuit performance. While it is imperative to model parameter varia...