Sciweavers

1862 search results - page 234 / 373
» General Architecture for Hardware Implementation of Genetic ...
Sort
View
119
Voted
DAC
2010
ACM
15 years 7 months ago
Reducing the number of lines in reversible circuits
Reversible logic became a promising alternative to traditional circuits because of its applications e.g. in low-power design and quantum computation. As a result, design of revers...
Robert Wille, Mathias Soeken, Rolf Drechsler
109
Voted
GLVLSI
2007
IEEE
158views VLSI» more  GLVLSI 2007»
15 years 10 months ago
Design of a versatile and cost-effective hybrid floating-point/LNS arithmetic processor
LNS (logarithmic number system) arithmetic has the advantages of high-precision and high performance in complex function computation. However, the large hardware problem in LNS ad...
Chichyang Chen, Paul Chow
146
Voted
ISCAS
2011
IEEE
278views Hardware» more  ISCAS 2011»
14 years 7 months ago
A programmable axonal propagation delay circuit for time-delay spiking neural networks
— we present an implementation of a programmable axonal propagation delay circuit which uses one first-order logdomain low-pass filter. Delays may be programmed in the 550ms rang...
Runchun Wang, Craig T. Jin, Alistair McEwan, Andr&...
134
Voted
IROS
2006
IEEE
180views Robotics» more  IROS 2006»
15 years 9 months ago
Real-Time Robot Audition System That Recognizes Simultaneous Speech in The Real World
— This paper presents a robot audition system that recognizes simultaneous speech in the real world by using robotembedded microphones. We have previously reported Missing Featur...
Shun'ichi Yamamoto, Kazuhiro Nakadai, Mikio Nakano...
DAC
2005
ACM
16 years 4 months ago
Correlation-preserved non-gaussian statistical timing analysis with quadratic timing model
Recent study shows that the existing first order canonical timing model is not sufficient to represent the dependency of the gate delay on the variation sources when processing an...
Lizheng Zhang, Weijen Chen, Yuhen Hu, John A. Gubn...