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97
Voted
DATE
2007
IEEE
112views Hardware» more  DATE 2007»
15 years 10 months ago
Automatic synthesis of compressor trees: reevaluating large counters
Despite the progress of the last decades in electronic design automation, arithmetic circuits have always received way less attention than other classes of digital circuits. Logic...
Ajay K. Verma, Paolo Ienne
136
Voted
FPGA
2004
ACM
119views FPGA» more  FPGA 2004»
15 years 9 months ago
A quantitative analysis of the speedup factors of FPGAs over processors
The speedup over a microprocessor that can be achieved by implementing some programs on an FPGA has been extensively reported. This paper presents an analysis, both quantitative a...
Zhi Guo, Walid A. Najjar, Frank Vahid, Kees A. Vis...
DAC
2009
ACM
16 years 4 months ago
Efficient SAT solving for non-clausal formulas using DPLL, graphs, and watched cuts
Boolean satisfiability (SAT) solvers are used heavily in hardware and software verification tools for checking satisfiability of Boolean formulas. Most state-of-the-art SAT solver...
Himanshu Jain, Edmund M. Clarke
DAC
2006
ACM
16 years 4 months ago
Optimal simultaneous mapping and clustering for FPGA delay optimization
Both technology mapping and circuit clustering have a large impact on FPGA designs in terms of circuit performance, area, and power dissipation. Existing FPGA design flows carry o...
Joey Y. Lin, Deming Chen, Jason Cong
153
Voted
SI3D
2006
ACM
15 years 9 months ago
Jump flooding in GPU with applications to Voronoi diagram and distance transform
This paper studies jump flooding as an algorithmic paradigm in the general purpose computation with GPU. As an example application of jump flooding, the paper discusses a constant...
Guodong Rong, Tiow Seng Tan