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MICRO
2007
IEEE
168views Hardware» more  MICRO 2007»
15 years 9 months ago
Global Multi-Threaded Instruction Scheduling
Recently, the microprocessor industry has moved toward chip multiprocessor (CMP) designs as a means of utilizing the increasing transistor counts in the face of physical and micro...
Guilherme Ottoni, David I. August
DAC
2004
ACM
16 years 4 months ago
Virtual memory window for application-specific reconfigurable coprocessors
Reconfigurable Systems-on-Chip (SoCs) on the market consist of full-fledged processors and large Field-Programmable Gate-Arrays (FPGAs). The latter can be used to implement the sy...
Miljan Vuletic, Laura Pozzi, Paolo Ienne
123
Voted
VISUALIZATION
1996
IEEE
15 years 7 months ago
Hierarchical and Parallelizable Direct Volume Rendering for Irregular and Multiple Grids
A general volume rendering technique is described that efficiently produces images of excellent quality from data defined over irregular grids having a wide variety of formats. Re...
Jane Wilhelms, Allen Van Gelder, Paul Tarantino, J...
222
Voted
ASPLOS
2009
ACM
16 years 4 months ago
DMP: deterministic shared memory multiprocessing
Current shared memory multicore and multiprocessor systems are nondeterministic. Each time these systems execute a multithreaded application, even if supplied with the same input,...
Joseph Devietti, Brandon Lucia, Luis Ceze, Mark Os...
DAC
2009
ACM
16 years 4 months ago
Handling don't-care conditions in high-level synthesis and application for reducing initialized registers
Don't-care conditions provide additional flexibility in logic synthesis and optimization. However, most work only focuses on the gate level because it is difficult to handle ...
Hong-Zu Chou, Kai-Hui Chang, Sy-Yen Kuo