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IJCNN
2000
IEEE
15 years 9 months ago
Design and Evaluation of Neural Networks for Coin Recognition by Using GA and SA
In this paper, we propose a method to design a neural network(NN) by using a genetic algorithm(GA) and simulated annealing(SA). And also, in order to demonstrate the effectivenes...
Yasue Mitsukura, Minoru Fukumi, Norio Akamatsu
165
Voted
GECCO
2006
Springer
135views Optimization» more  GECCO 2006»
15 years 9 months ago
Characterizing the dynamics of symmetry breaking in genetic programming
This paper introduces a metric that measures symmetry in tree graphs, which allows for a statistical characterization of GP solutions by their architectural "shapes." A ...
Jason M. Daida
FPL
2006
Springer
96views Hardware» more  FPL 2006»
15 years 9 months ago
High Speed Document Clustering in Reconfigurable Hardware
High-performance document clustering systems enable similar documents to automatically self-organize into groups. In the past, the large amount of computational time needed to clu...
G. Adam Covington, Charles L. G. Comstock, Andrew ...
157
Voted
SI3D
2006
ACM
15 years 11 months ago
Hardware accelerated multi-resolution geometry synthesis
In this paper, we propose a new technique for hardware accelerated multi-resolution geometry synthesis. The level of detail for a given viewpoint is created on-the-fly, allowing f...
Martin Bokeloh, Michael Wand
145
Voted
DATE
2005
IEEE
111views Hardware» more  DATE 2005»
15 years 7 months ago
Simultaneous Partitioning and Frequency Assignment for On-Chip Bus Architectures
In this paper, we provide a methodology to perform both bus partitioning and bus frequency assignment to each of the bus segment simultaneously while optimizing both power consump...
Suresh Srinivasan, Lin Li, Narayanan Vijaykrishnan