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PVM
2004
Springer
15 years 8 months ago
Numerical Simulations on PC Graphics Hardware
On recent PC graphics cards, fully programmable parallel geometry and pixel units are available providing powerful instruction sets to perform arithmetic and logical operations. In...
Jens Krüger, Thomas Schiwietz, Peter Kipfer, ...
DATE
2008
IEEE
134views Hardware» more  DATE 2008»
15 years 9 months ago
Scalable Architecture for on-Chip Neural Network Training using Swarm Intelligence
This paper presents a novel architecture for on-chip neural network training using particle swarm optimization (PSO). PSO is an evolutionary optimization algorithm with a growing ...
Amin Farmahini Farahani, Seid Mehdi Fakhraie, Saee...
ANCS
2005
ACM
15 years 8 months ago
High-throughput linked-pattern matching for intrusion detection systems
This paper presents a hardware architecture for highly efficient intrusion detection systems. In addition, a software tool for automatically generating the hardware is presented....
Zachary K. Baker, Viktor K. Prasanna
FPL
2008
Springer
153views Hardware» more  FPL 2008»
15 years 4 months ago
Exploring FPGA network on chip implementations across various application and network loads
Abstract-The network on chip will become a future general purpose interconnect for FPGAs much like today's standard OPB or PLB bus architectures. However, performance characte...
Graham Schelle, Dirk Grunwald
PROCEDIA
2010
138views more  PROCEDIA 2010»
14 years 10 months ago
Using the reconfigurable massively parallel architecture COPACOBANA 5000 for applications in bioinformatics
Currently several computational problems require high processing power to handle huge amounts of data, although underlying core algorithms appear to be rather simple. Especially i...
Lars Wienbrandt, Stefan Baumgart, Jost Bissel, Car...