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ASAP
2000
IEEE
125views Hardware» more  ASAP 2000»
15 years 7 months ago
High Level Modeling for Parallel Executions of Nested Loop Algorithms
High level modeling and (quantitative) performance analysis of signal processing systems requires high level models for the applications(algorithms) and the implementations (archi...
Ed F. Deprettere, Edwin Rijpkema, Paul Lieverse, B...
PVM
2010
Springer
15 years 1 months ago
Toward Performance Models of MPI Implementations for Understanding Application Scaling Issues
Abstract. Designing and tuning parallel applications with MPI, particularly at large scale, requires understanding the performance implications of different choices of algorithms ...
Torsten Hoefler, William Gropp, Rajeev Thakur, Jes...
FPGA
2003
ACM
156views FPGA» more  FPGA 2003»
15 years 8 months ago
Architectures and algorithms for synthesizable embedded programmable logic cores
As integrated circuits become more and more complex, the ability to make post-fabrication changes will become more and more attractive. This ability can be realized using programm...
Noha Kafafi, Kimberly Bozman, Steven J. E. Wilton
EC
2000
241views ECommerce» more  EC 2000»
15 years 3 months ago
Cooperative Coevolution: An Architecture for Evolving Coadapted Subcomponents
To successfully apply evolutionary algorithms to the solution of increasingly complex problems, we must develop effective techniques for evolving solutions in the form of interact...
Mitchell A. Potter, Kenneth A. De Jong
140
Voted
ATVA
2007
Springer
152views Hardware» more  ATVA 2007»
15 years 9 months ago
Bounded Synthesis
Abstract. The bounded synthesis problem is to construct an implementation that satisfies a given temporal specification and a given bound on the number of states. We present a so...
Sven Schewe, Bernd Finkbeiner