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ISCAS
2003
IEEE
144views Hardware» more  ISCAS 2003»
15 years 8 months ago
A flexible global readout architecture for an analogue SIMD vision chip
A new vision chip, SCAMP-2, has been developed in a 0.35µm CMOS technology. In this paper, the design of the chip is presented, with particular emphasis on its readout architectu...
Piotr Dudek
INFOCOM
2000
IEEE
15 years 7 months ago
Fast and Scalable Priority Queue Architecture for High-Speed Network Switches
-In this paper, we present a fast and scalable pipelined priority queue architecture for use in high-performance switches with support for fine-grained quality of service (QoS) gu...
Ranjita Bhagwan, Bill Lin
CODES
1997
IEEE
15 years 7 months ago
A generic multi-unit architecture for codesign methodologies
:Thispaper introduces a templatearchitecturefor codesignmethodologies.This architecture is basedon a data synchronizedcontrol schemethat is well adaptedto the implementation of num...
Guy Gogniat, Michel Auguin, Cécile Belleudy
113
Voted
CAL
2008
15 years 3 months ago
Pipelined Architecture for Multi-String Matching
We present a pipelined approach to hardware implementation of the Aho-Corasick (AC) algorithm for string matching called P-AC. By incorporating pipelined processing, the state grap...
Derek Chi-Wai Pao, Wei Lin, Bin Liu
GECCO
2008
Springer
112views Optimization» more  GECCO 2008»
15 years 4 months ago
Parameter-less evolutionary search
The paper presents the parameter-less implementation of an evolutionary-based search. It does not need any predefined control parameters values, which are usually used for geneti...
Gregor Papa