3119 search results - page 215 / 624 » General Default Logic |
DAC
2003
ACM
16 years 1 months ago
2003
ACM
Verification of system designs continues to be a major challenge today. Simulation remains the primary tool for making sure that implementations perform as they should. We present...
91
Voted
DAC
2003
ACM
16 years 1 months ago
2003
ACM
SAT-based decision procedures for quantifier-free fragments of firstorder logic have proved to be useful in formal verification. These decision procedures are either based on enco...
109
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DAC
2006
ACM
16 years 1 months ago
2006
ACM
A statistical model for the purpose of logic cell timing analysis in the presence of process variations is presented. A new current-based cell delay model is utilized, which can a...
114
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ISLPED
2009
ACM
15 years 7 months ago
2009
ACM
In this paper, we observe that minimum energy Emin of subthreshold logic dramatically increases when reaching 45 nm node. We demonstrate by circuit simulation and analytical model...
82
Voted
ATAL
2007
Springer
15 years 7 months ago
2007
Springer
Successful negotiators prepare by determining their position along five dimensions: Legitimacy, Options, Goals, Independence, and Commitment, (LOGIC). We introduce a negotiation ...