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» General Iteration graphs and Boolean automata circuits
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CAV
2000
Springer
197views Hardware» more  CAV 2000»
15 years 2 months ago
Bounded Model Construction for Monadic Second-Order Logics
Address: Abstraction, Composition, Symmetry, and a Little Deduction: The Remedies to State Explosion . . . . . . . . . . . . . . . . . . . . . . . . . . 1 A. Pnueli Invited Address...
Abdelwaheb Ayari, David A. Basin
DAC
1997
ACM
15 years 1 months ago
A Graph-Based Synthesis Algorithm for AND/XOR Networks
In this paper, we introduce a Shared Multiple Rooted XORbased Decomposition Diagram XORDD to represent functions with multiple outputs. Based on the XORDD representation, we dev...
Yibin Ye, Kaushik Roy
DAC
2009
ACM
15 years 10 months ago
Nanoscale digital computation through percolation
In this study, we apply a novel synthesis technique for implementing robust digital computation in nanoscale lattices with random interconnects: percolation theory on random graph...
Mustafa Altun, Marc D. Riedel, Claudia Neuhauser
MFCS
2005
Springer
15 years 3 months ago
Regular Sets of Higher-Order Pushdown Stacks
Abstract. It is a well-known result that the set of reachable stack contents in a pushdown automaton is a regular set of words. We consider the more general case of higher-order pu...
Arnaud Carayol
GECCO
2003
Springer
132views Optimization» more  GECCO 2003»
15 years 3 months ago
Circuit Bipartitioning Using Genetic Algorithm
Abstract. In this paper, we propose a hybrid genetic algorithm for partitioning a VLSI circuit graph into two disjoint graphs of minimum cut size. The algorithm includes a local op...
Jong-Pil Kim, Byung Ro Moon