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HPCA
2004
IEEE
16 years 5 days ago
Out-of-Order Commit Processors
Modern out-of-order processors tolerate long latency memory operations by supporting a large number of inflight instructions. This is particularly useful in numerical applications...
Adrián Cristal, Daniel Ortega, Josep Llosa,...
DATE
2002
IEEE
84views Hardware» more  DATE 2002»
15 years 4 months ago
Highly Scalable Dynamically Reconfigurable Systolic Ring-Architecture for DSP Applications
Microprocessors are today getting more and more inefficient for a growing range of applications. Its principles -The Von Neumann paradigm[3]- based on the sequential execution of ...
Gilles Sassatelli, Lionel Torres, Pascal Benoit, T...
PC
2007
161views Management» more  PC 2007»
14 years 11 months ago
High performance combinatorial algorithm design on the Cell Broadband Engine processor
The Sony–Toshiba–IBM Cell Broadband Engine (Cell/B.E.) is a heterogeneous multicore architecture that consists of a traditional microprocessor (PPE) with eight SIMD co-process...
David A. Bader, Virat Agarwal, Kamesh Madduri, Seu...
MIDDLEWARE
2001
Springer
15 years 4 months ago
The CORBA Activity Service Framework for Supporting Extended Transactions
Although it has long been realised that ACID transactions by themselves are not adequate for structuring long-lived applications and much research work has been done on developing...
Iain Houston, Mark C. Little, Ian Robinson, Santos...
DAC
2009
ACM
16 years 24 days ago
Event-driven gate-level simulation with GP-GPUs
Logic simulation is a critical component of the design tool flow in modern hardware development efforts. It is used widely ? from high-level descriptions down to gate-level ones ?...
Debapriya Chatterjee, Andrew DeOrio, Valeria Berta...