Standard concurrency control mechanisms offer a trade-off: Transactional memory approaches maximize concurrency, but suffer high overheads and cost for retrying in the case of act...
Yannis Smaragdakis, Anthony Kay, Reimer Behrends, ...
The performance of most embedded systems is critically dependent on the average memory access latency. Improving the cache hit rate can have significant positive impact on the per...
So-called Whittle networks have recently been shown to give tight approximations for the performance of non-locally balanced networks with blocking, including practical routing pol...
Caches play an important role in embedded systems by bridging the performance gap between high speed processors and slow memory. At the same time, caches introduce imprecision in ...
Abstract. We study the problem of determining, given a run of a concurrent program, whether there is any alternate execution of it that violates atomicity, where atomicity is defin...
Azadeh Farzan, P. Madhusudan, Francesco Sorrentino