232 search results - page 6 / 47 » Generalised Resource Model for Parallel Instruction Scheduli... |
98
Voted
HICSS
1995
IEEE
15 years 3 months ago
1995
IEEE
Abstract. We reexamine the limits of parallelism available in programs, using runtime reconstruction of program data-flow graphs. While limits of parallelism have been examined in...
92
Voted
ICPPW
2007
IEEE
15 years 6 months ago
2007
IEEE
Several challenges about computational grid exist in integrating, coordinating and managing of resources and scheduling of applications, due to distributed resources at various le...
MICRO
1999
IEEE
15 years 3 months ago
1999
IEEE
Since there is generally insufficient instruction level parallelism within a single basic block, higher performance is achieved by speculatively scheduling operations in superbloc...
89
Voted
DAC
2002
ACM
16 years 18 days ago
2002
ACM
Aim of this paper is to propose a methodology for the definition of an instruction-level energy estimation framework for VLIW (Very Long Instruction Word) processors. The power mo...
128
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HPCA
1995
IEEE
15 years 3 months ago
1995
IEEE
The throughput of a multiple-pipelined processor suffers due to lack of sufficient instructions to make multiple pipelines busy and due to delays associated with pipeline depende...